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sm8133b seiko npc corporation ? white led driver ic overview the sm8133b is a charge pump type white led driver. it can drive 1 to 6 backlight white led connected in parallel and 1 ?sh white led. the output voltage circuit has a 3.0v ldo (low dropout regulator), making the device ideal for camera-equipped cellular phones. the charge pump switches between 1 to 1.5 boost mode in response to led drive current requirements to extend battery life to the maximum. the boost switch- ing occurs in response to the drive current of all the connected led and thus supports variations in led for- ward-bias voltage drop (vf). each led drive current is controlled by a 7-channel led drive current control circuit. the 6 backlight channels can be subdivided into 2 groups, with each group having independent dim- ming and lighting control. the backlight grouping, backlight led drive current and on/off control, ?sh led drive current and on/off control, and ldo output on/off control are all set by 3-wire serial interface data input. also, the resetb pin can be connected to the microcontroller supply for a system-wide shutdown function. features noise reduction due to charge pump boost circuit automatic charge pump switching to conserve power drives 1 to 6 backlight white led (30ma/ch at maximum setting) drives a ?sh white led (150ma at maximum setting) backlight and ?sh white led brightness adjustment group settings for 2-group backlight lighting control 3-wire serial input interface for all setting and control 3.0v output ldo circuit built-in shutdown function by resetb pin soft start circuit built-in thermal protection circuit built-in input voltage range no-load current (i out = 0ma): 2.7 to 4.6v load current (i out = 80ma): 3.0 to 4.6v load current (i out = 200ma): 3.3 to 4.6v quiescent current ldo only: 0.3ma (typ) not -switching ( 1.0 mode): 0.5ma (typ) switching ( 1.5 mode): 2.5ma (typ) standby current: 0.01 a (typ) operating frequency: 750khz (typ) backlight led current: 30ma/ch (typ) flash led current: 150ma (typ) all led total maximum current: 200ma (typ) backlight led current matching (i led = 30ma) : 3% flash led current accuracy (i led = 150ma) : 5% ldo (low dropout regulator) output voltage : 3.0v 2% packages: 20-pin qfn wl-csp (under development) applications cellular phone digital still camera pda portable games ordering information device package SM8133BB 20-pin qfn sm8133bw wl-csp
sm8133b seiko npc corporation ? package dimensions (unit: mm) qfn-20 wl-csp (under development) 4.20 0.20 4.00 0.10 4.00 0.10 4.20 0.20 1 0.50 0.60 0.10 0.22 1.00max 0.02 ? 0.02 + 0.03 0.22 0.05 0.05 0.05 m 20 2.56 0.03 0.55 0.02 0.08 0.03 0.4 0.09 0.007 20 ? 0.2 0.03 0.05 top view bottom view 0.48 0.03 0.68 0.03 2.56 0.03 0.06 s s 0.4 sab a b c d b a 1 2345 m
sm8133b seiko npc corporation ? pinout (top view) qfn-20 wl-csp (under development) pin description 12345 15 14 13 12 11 10 9 8 7 6 16 17 18 19 20 vin c2p c2m c1m c1p en din7 din6 din5 gnd din4 din3 din2 din1 pgnd sda sck resetb vout ldout a b c d 1 2 3 4 5 number name i/o description qfn-20 wl-csp 1 d1 din4 o led drive current control output 4 ( connect to ground when not used) 2 c1 din3 o led drive current control output 3 ( connect to ground when not used) 3 b1 din2 o led drive current control output 2 ( connect to ground when not used) 4 b2 din1 o led drive current control output 1 ( connect to ground when not used) 5 a2 pgnd charge pump ground connection 6 a1 c1p charge pump capacitor connection 1p 7 a3 c1m charge pump capacitor connection 1m 8 b3 c2m charge pump capacitor connection 2m 9 b4 c2p charge pump capacitor connection 2p 10 a4 vin voltage supply 11 a5 ldout o ldo output (leave open circuit when not used) 12 b5 vout o led drive voltage output 13 c5 resetb i reset signal input (internal reset when resetb is low) 14 c4 sck i serial data clock input 15 d5 sda i serial data input 16 d4 en i serial interface enable input 17 c3 din7 o led drive current control output 7 ( connect to ground when not used) 18 d3 din6 o led drive current control output 6 ( connect to ground when not used) 19 d2 din5 o led drive current control output 5 ( connect to ground when not used) 20 c2 gnd ground
sm8133b seiko npc corporation ? block diagram vin sda sck en control logic thermal shut down resetb current control & under current detector mode control & output voltage control & protection c1p c1m c2p c2m ldo 3v & protection din1 din2 din3 din4 din5 din6 ldout din7 gnd charge pump vout pgnd 1/ 1.5
sm8133b seiko npc corporation ? specifications absolute maximum ratings gnd = pgnd = 0v note. the device may suffer breakdown if any one of these parameter ratings is exceeded. maximum junction temperature: t max = 125 c operating temperature: ta [ c] thermal resistance: j = 70 c/w recommended operating conditions gnd = pgnd = 0v parameter symbol rating unit supply voltage range v in ? 0.3 to 5.5 v input voltage range v en , v sck , v sda ?.3 to v in + 0.3 v output voltage range v din1 to 7 ?.3 to v in + 0.3 v v out 5.5 v vout output current i out 500 ma ldo output current i ldo 200 ma power dissipation p d 1429 (ta = 25 c) *1 *1. when mounted on a 34 40 1.6mm glass epoxy board, the power dissipation is related to the operating temperature by the following equation. mw junction temperature t jmax +125 c storage temperature range t stg ? 55 to +125 c p = (t max ? ta) d j 0 400 800 1200 1600 25 35 45 55 65 75 85 operating temperature [ c] power dissipation [mw] 1429 1143 857 571 parameter pin symbol conditions rating unit min typ max supply voltage range vin v in1 1.0 mode, i out = 0ma 2.7 3.6 4.6 v v in2 1.5 mode, i out = 80ma 3.0 3.6 4.6 v v in3 1.5 mode, i out = 200ma 3.3 3.6 4.6 v input voltage range en, sck, sda, resetb v es each logic-level pin 0 ? v in v ambient temperature range ? ta ? 30 ? +85 c
sm8133b seiko npc corporation ? electrical characteristics dc characteristics gnd = pgnd = 0v, v in = 3.6v, ta = 25 c unless otherwise noted. parameter pin symbol condition rating unit min typ max standby current vin i stb standby mode 0.01 1.00 a quiescent current vin i dd1 ldo-only operating, no load 0.3 0.7 ma i dd2 1.0 mode, no load 0.5 1.0 ma i dd3 1.5 mode, no load 2.5 4.0 ma maximum output voltage vout v out 1.5 mode vout maximum voltage 4.8 5.0 5.2 v maximum output current vout i out 1.5 mode 200 ma operating frequency c1m f osc 1.5 mode switching frequency 650 750 850 khz internal circuit power-on reset time *1 *1. design guaranteed value vin t por time from when power is applied until internal circuit reset 0.02 0.10 ms soft start time din1 to 7 t ss time between en signal falling edge and led turning on 1.3 3.0 ms led drive pin leakage current din1 to 7 i leak1 to 7 standby mode, v din1 to 7 = 5.0v 0.01 1.00 a led drive current matching din1 to 6 ? i led 1.0 mode, matching between channels with i led1 to 6 maximum setting ?.0 +3.0 % led maximum drive current 1 din1 to 6 i led1 to 6 1.0 mode, i led1 to 6 maximum setting 27.0 30.0 33.0 ma led drive pin voltage 1 din1 to 6 v din1 to 6 i led1 to 6 maximum setting 80 120 150 mv led maximum drive current 2 din7 i led7 1.5 mode, i led7 maximum setting 142.5 150.0 157.5 ma led drive pin voltage 2 din7 v din7 i din7 maximum setting 225 300 375 mv ldo output voltage ldout v ldo v in = 3.6v, i ldo = 100ma 2.94 3.00 3.06 v ldo maximum output current ldout i ldo v in = 3.0v, v ldo = 2.85v 100 ma ldo input stability ldout ? v out1 3.3v v in 4.6v, i ldo = 30ma 1.0 %/v ldo load stability ldout ? v out2 v in = 3.6v, 10 a i ldo 80ma 100 mv ldo overcurrent protection circuit operating current ldout i os v in = 3.6v 120 230 360 ma thermal protection circuit operating temperature *1 ? sd not in test mode 180 c thermal protection circuit hysteresis *1 ? sdhys not in test mode 20 c logic-level input voltage en, sck, sda, resetb v ih high-level input voltage range 1.8 v v il low-level input voltage range 0.6 v v ihys hysteresis voltage width 0.3 0.5 v logic-level input current en, sck, sda, resetb i il en = sck = sda = resetb = vin 1.0 a i ih en = sck = sda = resetb = gnd ?.0 a
sm8133b seiko npc corporation ? ac characteristics gnd = 0v, v in = 3.6v, ta = 25 c unless otherwise noted. parameter symbol condition rating unit min typ max sck clock cycle t sck 2000 dc ns sck high-level pulse width t wh 800 ns sck low-level pulse width t wl 800 ns en setup time t cs 1000 ns en hold time t ch 800 ns en recovery time t cr 1000 ns write data setup time t ds 600 ns write data hold time t dh 600 ns data input timing diagram t cs sck t wh t wl t sck en sda t ch t cr t ds t dh
sm8133b seiko npc corporation ? v out efficiency ef?iency of p in vs. p out backlight led 6pcs, i led1 to 6 = 20ma, flash led 1pc, i led7 = 0ma, i out = 120ma, i ldo = 0ma ef?iency of p in vs. p out backlight led 3pcs, i led1 to 6 = 15ma, flash led 1pc, i led7 = 0ma, i out = 45ma, i ldo = 0ma 50 60 70 80 90 100 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 v in [v] v out power efficiency [%] vf = 3.2v vf = 3.4v vf = 3.6v vf = 3.8v 50 60 70 80 90 100 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 v in [v] vf = 3.2v vf = 3.4v vf = 3.6v vf = 3.8v v out power efficiency [%]
sm8133b seiko npc corporation ? ef?iency of p in vs. p out backlight led 6pcs, i led1 to 6 = 20ma, flash led 1pc, i led7 = 80ma, i out = 200ma, i ldo = 0ma ef?iency of p in vs. p out backlight led 3pcs, i led1 to 6 = 15ma, flash led 1pc, i led7 = 150ma, i out = 195ma, i ldo = 0ma 50 60 70 80 90 100 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 v in [v] vf = 3.2v vf = 3.4v vf = 3.6v vf = 3.8v v out power efficiency [%] 50 60 70 80 90 100 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 v in [v] vf = 3.2v vf = 3.4v vf = 3.6v vf = 3.8v v out power efficiency [%]
sm8133b seiko npc corporation ?0 ef?iency of p in vs. p out backlight led 6pcs, i led1 to 6 = 20ma, flash led 1pc, i led7 = 80ma, i out = 200ma, i ldo = 100ma ef?iency of p in vs. p out backlight led 3pcs, i led1 to 6 = 15ma, flash led 1pc, i led7 = 150ma, i out = 195ma, i ldo = 100ma vf = 3.2v vf = 3.4v vf = 3.6v vf = 3.8v 50 60 70 80 90 100 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 v in [v] v out power efficiency [%] 50 60 70 80 90 100 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 v in [v] vf = 3.2v vf = 3.4v vf = 3.6v vf = 3.8v v out power efficiency [%]
sm8133b seiko npc corporation ?1 functional description serial interface the sm8133b uses a 3-wire serial interface to control each setting. input data on sda is input msb rst in an 8 clock pulse cycle structure, with the rst 4 cycles of data setting the mode and the next 4 the corresponding mode data. data bits on sda are read as received data on the rising edges of the sck clock after en goes high. only the leading 8 bits on sda are read after en goes high and all subsequent input data bits are ignored, but the received data is re ected in sm8133b operation with timing almost simultaneous with the en falling edge. conversely, if less than 8 bits are input on sda, the data is ignored to prevent incorrect operation. all registers are write-only, and their status cannot be read. after power is applied, an internal power-on reset circuit initializes all registers to logic level low in standby mode. however, the possibility exists that there may be insuf cient reset time, depending on the vin input voltage rise time and fall time, so reset mode (0h or eh) should be expressly invoked after power is applied. there is no restriction in the input sequence when set- ting parameters. however, since the parameters are set in the same order as the data input sequence and the time taken from led on/off data input to led dimming data input can exceed the soft start time, it is highly advisable to enter the led dimming data rst. the charge pump circuit, that supplies the led drive voltage, starts whenever any parameter in address 5h (led on register) is set to 1, with the led drive voltage output on vout. conversely, when all parameters in address 5h are set to 0, all other parameter data settings input after reset are retained in standby mode. the serial interface pins en, sda, csk, and resetb are cmos inputs, thus the input voltage on vin must be a logic-level voltage and should not be left open circuit ( oating). control data mode selection mode selection data setting data m1 m2 m3 m4 d1 d2 d3 d4 msb data 1 data 2 data 3 data 4 data 5 data 6 lsb control data input sequence mode data 0h 1h 2h 3h 4h mode reset grouping a group dimming b group dimming din7 dimming m1-m2-m3-m4 l-l-l-l l-l-l-h l-l-h-l l-l-h-h l-h-l-l mode data 5h 6h eh fh other mode led on system settings reset serial input test npc test m1-m2-m3-m4 l-h-l-h l-h-h-l h-h-h-l h-h-h-h ? sck m1 m2 en m3 m4 d1 d2 d3 d4 sda
sm8133b seiko npc corporation ?2 mode data ?h? reset register mode data ?h? reset register reset mode is selected if en goes low 4 clock cycles after 0h or eh mode select data is input, regardless of when power is applied or the parameter set data bits. when reset mode is selected, all data input previously is reset, thus grouping, dimming, and control data must be reentered. mode data ?h? grouping register led1 and led2 are always assigned to a group. when a setting data bit is low, a group is selected. when high, b group is selected. mode data ?h? a group dimming register mode data ?h? b group dimming register mode data ?h? din7 dimming register d1 to d4 setting data bits control the each group led current in 15 steps. see led drive current . setting data d1 d2 d3 d4 high all system data reset low system standby setting data d1 d2 d3 d4 high led3 = b group led4 = b group led5 = b group led6 = b group low led3 = a group led4 = a group led5 = a group led6 = a group setting data d1 d2 d3 d4 selected dimming value 0h low low low low 0/15 1h low low low high 1/15 2h low low high low 2/15 3h low low high high 3/15 4h low high low low 4/15 5h low high low high 5/15 6h low high high low 6/15 7h low high high high 7/15 8h high low low low 8/15 9h high low low high 9/15 ah high low high low 10/15 bh high low high high 11/15 ch high high low low 12/15 dh high high low high 13/15 eh high high high low 14/15 fh high high high high 15/15
sm8133b seiko npc corporation ?3 mode data ?h? led on register this register controls the a group, b group, din7, and ldo on/off state. each state is on when the corre- sponding bit is high, and off when low. each circuit starts when the corresponding bit in address 5h is set high, transferring from standby mode. it is recommended that these 4 data settings be held low when possi- ble to control current consumption. mode data ?h? system register note. target values only. current rating accuracy is not guaranteed. this register sets the maximum current drive for each group. for a and b group, low sets 30ma as the maxi- mum, high sets 15ma. for din7, low sets 150ma, high sets 75ma as the maximum. note. ?? hexadecimal note. target values only. current rating accuracy is not guaranteed. setting data d1 d2 d3 d4 high a group on b group on din7 on ldo on low a group off b group off din7 off ldo off setting data d1 d2 d3 d4 high a group maximum current = 15ma b group maximum current = 15ma din7 maximum current = 75ma ? low a group maximum current = 30ma b group maximum current = 30ma din7 maximum current = 150ma ? led drive current (hexadecimal) dimming register value a group b group din7 unit a group max. current = 0 a group max. current = 1 b group max. current = 0 b group max. current = 1 din7 max. current = 0 din7 max. current = 1 0h000000ma 1h2121105ma 2h42422010ma 3h63633015ma 4h84844020ma 5h1051055025ma 6h1261266030ma 7h1471477035ma 8h1681688040ma 9h1891899045ma ah 20 10 20 10 100 50 ma bh 22 11 22 11 110 55 ma ch 24 12 24 12 120 60 ma dh 26 13 26 13 130 65 ma eh 28 14 28 14 140 70 ma fh 30 15 30 15 150 75 ma
sm8133b seiko npc corporation ?4 ldo (low dropout voltage regulator) operation is controlled using the ldo register (lsb in address 5h ). when the ldo register is set to 1, a regulated stable voltage is output from ldout. if the overcurrent protection circuit connected to ldout detects a continuous overcurrent condition for approximately 200 s, the ldo output stops and then restarts after a delay of approximately 1.4 seconds. at this point, if an overcurrent condition is detected again, the ldo output stops. if the overcurrent condition is detected a total of 12 successive times (approximately 16.8 sec- onds), the ldo load is deemed to be abnormal and the ldo output stops completely. the abnormal load con- dition is released only by selecting reset mode operation. thermal shutdown circuit (overheating protection) the thermal shutdown circuit operates whenever the ic temperature exceeds approximately 180 c for what- ever reason. vout output recommences when the ic temperature falls below approximately 160 c. resetb input (internal circuit reset signal) if the microcontroller, which drives the serial data inputs, stops, the sm8133b logic-level signal inputs are left oating and the sm8133b will most likely not transfer to standby mode normally. however, the resetb pin can be connected to the microcontroller supply pin, so that the sm8133b is reset automatically whenever the voltage on resetb drops. a pull-down resistor should be connected between resetb and gnd to avoid a oating resetb input with voltage applied to the vin pin. v out output circuit mode switching the sm8133b switches between 3 output states: power-save mode (standby state), 1.0 mode (vin through mode), and 1.5 mode ( 1.5 charge pump boost). this automatically adjusts the vout output to match the drive led characteristics and reduces the total power dissipation. switching to and from 1.0 and 1.5 mode occurs automatically in an internal circuit, and cannot be controlled using an external input. switching to standby mode the internal circuit operating mode switches from 1.0/ 1.5 mode to standby mode when reset resistor (mode data 0h , eh ) was input, suppressing current consumption.
sm8133b seiko npc corporation ?5 switching from 1.0 mode to 1.5 mode if the led drive current set by serial interface can be driven without boosting the v in input voltage, the v out output operates in 1.0 mode. in other words, if suf cient current ows even with the led forward-direction voltage drop vf , then v out is less than 5.0v. operation in the more ef cient 1.0 mode reduces the total power dissipation and extends the battery drive time. and if low vf leds are used or the led drive current setting is low, the operating time in 1.0 mode is also extended. if the v in voltage falls or led drive current set by serial interface increases such that the led drive current is too low in 1.0 mode, then the led drive circuit low-current detector operates, the v out output is automati- cally switched to 1.5 mode, and the charge pump boosts the output voltage. this occurs even if only one led low-current condition is detected among the 7-channel led drive circuits, thus it is recommended that leds have small vf variation to optimize the total ef ciency. (1) when v in falls, v out cannot overcome the led vf rating, causing insuf cient current ows and the i led low-current signal becomes active. (2) when the i led low-current condition is detected, the v out output circuit switches to 1.5 mode (charge pump mode). (3) prior to switching to 1.5 mode, the v out voltage may be lower than 5.0v but suf cient current is sup- plied to the led. if after startup, the led connected to a din pin is switched, the led connection detector circuit ags an error, and correct mode switching may not occur. if the din pin does not control the led drive current, the low-cur- rent detector does not operate and the device cannot switch to 1.5 mode. v out mode switching time comparison due to drive led vf variation v in voltage drop and v out output voltage high high vf led low vf led 1.0 mode (high efficiency) vin input 1.5 mode (low efficiency) 1.5 mode (low efficiency) low 1.0 mode (high efficiency) v in input voltage low i led detector v out mode v out output voltage low i led detected 5.0v 1.0 mode (1) (2) (3) 1.5 mode 1.0 1.5 threshold
sm8133b seiko npc corporation ?6 switching from 1.5 mode to 1.0 mode vf increases immediately after the led current starts to ow, and then decreases as the led temperature increases due to the heating effect of the current ow. it can take about 10 seconds for the led temperature to stabilize and for vf to reach equilibrium, and vf may uctuate more than 200mv. the vf uctuation is affected by the ambient temperature and led current setting, and has a large affect on the automatic mode switching voltage tolerances. to counter the effects of vf uctuation, the sm8133b outputs a mode reset sig- nal once every 1.4 seconds which automatically switches the output mode to 1.0, and then a determination is made whether to make the 1.0 1.5 mode switch. (1) mode reset signal is output once every 1.4 seconds. (2) switching from 1.5 to 1.0 mode due to the mode reset signal pulse. (3) the mode hold time of 200 s (max) starts when output switches to 1.0 mode. during this interval, the mode is not switched even if an i led undercurrent condition is detected. (4) if v in is low, the v out voltage momentarily drops because the boost function stops as a result of switching to 1.0 mode. (5) the i led undercurrent signal is ignored during the mode hold time, and the mode only switches in response to the detector output after the mode hold time expires. switching from 1.5 to 1.0 mode due to the mode reset signal mode hold l: hold v out output voltage low i led detector mode reset 1.4sec/cycle 1.0 mode min 80 s max 200 s i led detector ignore 5.0v 1.5 mode v out mode (1) (2) (3) (4) (5)
sm8133b seiko npc corporation ?7 for example, if the v in voltage is low and the v out output voltage in 1.0 mode does not provide suf cient drive current, then the mode reset will cause a led undercurrent condition. the led undercurrent detector circuit will output an led undercurrent signal immediately after the switch to 1.0 mode, but the output will stay in 1.0 mode and not return to 1.5 mode for the duration of the mode hold time. consequently, the v out output is not boosted during the 85 s (min) to 200 s (max) mode hold time and the voltage drops and the led brightness is reduced. however, the leds are off for a maximum of 200 s only, and this is not discernible to the naked eye and thus is not a problem. v out drop due to the mode reset single mode reset (1.4sec/cycle) mode hold (h: hold) low i led detector (h: low i led ) v out output voltage v in input voltage 1.4sec max 200 s 1.0 1.5 threshold 5.0v v out mode (h: 1.5, l: 1.0)
sm8133b seiko npc corporation ?8 startup sequence after power is applied to the sm8133b or when a reset input occurs (active-low input on resetb or reset register mode setting), the internal power-on reset circuit initializes all registers to their default value of 0. consequently, all required data for led drive operation must be input using the serial interface. the registers can be addressed in arbitrary sequence. note that the registers are set in the same sequence as they are addressed. example 1. set led1 to led6 to 30ma drive without group setting set en high, input 2fh using the serial interface, set en low (a group current setting 30ma), set en high, input 58h , set en low (a group on), led1 to led6 turn on after the soft start ends. example 2. set led1 to led4 to a group, led5 and led6 to b group, and individual group brightness input 13h using the serial interface (group setting), input 25h (a group current setting 10ma), input 3ah (b group current setting 20ma), input 5ch (a and b groups on) on successive en cycles. led1 to led6 turn on after the soft start ends. example 1 input waveform example 2 input waveform sda sck en 12345678 12345678 i led1 to 6 soft start time approx. 30ma set a group current: 30ma (2fh) a group on (58h) sda sck en 12345678 12345678 i led1 to 4 12345678 soft start time approx. 10ma i led5 to 6 approx. 20ma 12345678 set a group current: 10ma (25h) set b group current: 20ma (3ah) a group, b group on (5ch) led1 to led4 a group set grouping (13h) led5 to led6 b group
sm8133b seiko npc corporation ?9 example 3. set led1 to led6 to 30ma drive, temporarily turn off, turn on again, and reset using resetb input without group setting input 2fh (a group current setting 30ma) and 58h (a group on) from the serial interface. led1 to led6 turn on after the soft start ends. while the leds are on, input 50h (a group off) to turn the leds off and transfer the sm8133b to standby mode. the internal register setting 2fh (a group current setting 30ma) data is retained during standby mode, so you need to input 58h (a group on) only to turn the leds on again. at this point, the charge pump soft start circuit operates again, taking a soft start time of approxi- mately 1.3ms from when the data is input to when the leds turn on. if resetb is connected to the micro- controller power supply and the supply goes low, the sm8133b is reset, the leds turn off, and operation transfers to standby mode. example 3 input waveform sda sck en 12345678 12345678 i led1 to 6 12345678 resetb approx. 30ma 12345678 a group on (58h) set a group current : 30ma (2fh) led mode soft start time approx. 30ma soft start time reset mode a group off (50h) a group on (58h) led on mode reset reset mode
sm8133b seiko npc corporation ?0 typical application circuit if the resetb input is connected to the microcontroller power supply, the sm8133b is reset when microcon- troller power supply stops, and operation transfers to standby mode. in circuits where the sm8133b logic-level inputs would become open circuit ( oating) when the microcontroller supply stops, pull-down resistors should be connected to each logic-level signal input. note. if the driving leds are less than 7 pcs, the unused din pins should be connected to gnd. if the ldo is not used, ldout pin should be left open circuit. vin sda sck en control logic resetb current control & under current detector mode control & output voltage control & protection c1p c1m c2p c2m ldo 3v & protection vout din1 din2 din3 din4 din5 din6 ldout flash max 150ma din7 gnd 3v 2% (v in 3.2v) max 100ma back light max 30ma 6ch c1 1.0 f c2 1.0 f c4 2.2 f c3 2.2 f c5 1.0 f thermal shut down pgnd 2.7 to 4.6v ldo for microcontroller power source microcontroller pull down pull down vdd battery charge pump 1/ 1.5
sm8133b seiko npc corporation ?1 peripheral parts about the external capacitors the best capacitors for use with the sm8133b are multi-layer ceramic capacitors. when selecting a multi-layer ceramic capacitor, only x5r and x7r dielectric types are strongly recommended, since the loss of capacitance in various conditions is less than other types such as z5u and y5v. the much loss of capacitance in various conditions may cause the output voltage unstable. about the input capacitor "c4" the parts layout of pcb may merely cause the v out output voltage unstable. in this case, increasing the c4 input capacitance value or adding another capacitor on the vin input line is effective to solve the unsta- ble output voltage. qfn-20 package package corner metals are not ic i/o pins. don t connect any lines to these corner metals. table. the eia three digit "tc" code lower temperature limit high temperature limit maximum allowable capacitance change from + 25 c (0v dc) x = ? 55 c 5 = + 85 c f = ?7.5% y = ? 30 c 6 = + 105 c p = ?10% z = + 10 c 7 = + 125 c r = ?15% 8 = + 150 c s = ?22% t = + 22%/ ? 33% u = + 22%/ ? 56% v = + 22%/ ? 82% for example : x5r bottom view
sm8133b seiko npc corporation ?2 footprint pattern the optimum footprint varies depending on the board material, soldering paste, soldering method, and equip- ment accuracy, all of which need to be considered to meet design speci cations. (unit: mm) package he hd e b3 l1 l2 qfn-20 4.2 4.2 0.5 0.30 0.05 0.20 0.05 0.70 0.05 b3 l2 l1 hd /2 e b3 e hd l2 l1 he /2 he
sm8133b seiko npc corporation ?3 nc0503ce 2006.04 please pay your attention to the following points at time of using the products shown in this document. the products shown in this document (hereinafter ?roducts? are not intended to be used for the apparatus that exerts harmful in?ence on human lives due to the defects, failure or malfunction of the products. customers are requested to obtain prior written agreeme nt for such use from seiko npc corporation (hereinafter ?pc?. customers shall be solely responsible for, and indemnify and hold npc free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. npc reserves the right to change the speci?ations of the products in order to improve the characteristic or reliability thereof. npc makes no claim o r warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. therefore, npc shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in t his document. any descriptions including applications, circuits, and the parameters of the products in this document are for reference to use the products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further te sting or modi?ation. customers are requested not to export or re-export, directly or indirectly, the products to any country or any ent ity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. customers are req uested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. seiko npc corporation 15-6, nihombashi-kabutocho, chuo-ku, tokyo 103-0026, japan telephone: +81-3-6667-6601 facsimile: +81-3-6667-6611 http://www.npc.co.jp/ email: sales @ npc.co.jp

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